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ISCC
2005
IEEE
119views Communications» more  ISCC 2005»
16 years 12 days ago
A Systematic Approach to Building High Performance Software-Based CRC Generators
—A framework for designing a family of novel fast CRC generation algorithms is presented. Our algorithms can ideally read arbitrarily large amounts of data at a time, while optim...
Michael E. Kounavis, Frank L. Berry
ISCA
1994
IEEE
123views Hardware» more  ISCA 1994»
15 years 11 months ago
Software-Extended Coherent Shared Memory: Performance and Cost
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
David Chaiken, Anant Agarwal
IPPS
2008
IEEE
16 years 1 months ago
High performance MPEG-2 software decoder on the cell broadband engine
The Sony-Toshiba-IBM Cell Broadband Engine is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD coprocessing units (SPEs) ...
David A. Bader, Sulabh Patel
SIGCOMM
2009
ACM
16 years 1 months ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
GRID
2003
Springer
16 years 19 hour ago
From Web Services to OGSA: Experiences in Implementing an OGSA-based Grid Application
In previous work we have presented the ZENTURIO experiment management system for performance and parameter studies of parallel and distributed applications on cluster and Grid arc...
Radu Prodan, Thomas Fahringer