Sciweavers

2237 search results - page 96 / 448
» Architectural design and evaluation of an efficient Web-craw...
Sort
View
ERSA
2008
185views Hardware» more  ERSA 2008»
15 years 7 months ago
Design Framework for Partial Run-Time FPGA Reconfiguration
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
Chris Conger, Ann Gordon-Ross, Alan D. George
ECRTS
2009
IEEE
15 years 4 months ago
On the Design and Implementation of a Cache-Aware Multicore Real-Time Scheduler
Multicore architectures, which have multiple processing units on a single chip, have been adopted by most chip manufacturers. Most such chips contain on-chip caches that are share...
John M. Calandrino, James H. Anderson
DAC
1998
ACM
15 years 10 months ago
OCCOM: Efficient Computation of Observability-Based Code Coverage Metrics for Functional Verification
—Functional simulation is still the primary workhorse for verifying the functional correctness of hardware designs. Functional verification is necessarily incomplete because it i...
Farzan Fallah, Srinivas Devadas, Kurt Keutzer
ASPLOS
2006
ACM
16 years 11 days ago
Tartan: evaluating spatial computation for whole program execution
Spatial Computing (SC) has been shown to be an energy-efficient model for implementing program kernels. In this paper we explore the feasibility of using SC for more than small k...
Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea...
ICML
2006
IEEE
16 years 7 months ago
Fast direct policy evaluation using multiscale analysis of Markov diffusion processes
Policy evaluation is a critical step in the approximate solution of large Markov decision processes (MDPs), typically requiring O(|S|3 ) to directly solve the Bellman system of |S...
Mauro Maggioni, Sridhar Mahadevan