2237 search results - page 85 / 448 » Architectural design and evaluation of an efficient Web-craw... |
174
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FPL
2007
Springer
15 years 10 months ago
2007
Springer
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
160
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
We propose two novel integration techniques -- bypass and bookkeeping -- in the memory controller to address the cache coherence compatibility issue of a non-shared bus heterogene...
143
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VLSID
2005
IEEE
16 years 6 months ago
2005
IEEE
Inter-wire coupling is a major source of power consumption and delay faults for on-chip buses implemented in UDSM SoC Systems. Elimination or minimization of such faults is crucia...
170
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
165
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IPPS
2000
IEEE
15 years 10 months ago
2000
IEEE
This paper describes the design and implementation on MIMD parallel machines of P-AutoClass, a parallel version of the AutoClass system based upon the Bayesian method for determini...