2237 search results - page 48 / 448 » Architectural design and evaluation of an efficient Web-craw... |
174
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SBCCI
2003
ACM
15 years 11 months ago
2003
ACM
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
183
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TOMACS
1998
15 years 6 months ago
1998
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
185
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ASAP
2008
IEEE
16 years 23 days ago
2008
IEEE
This article discusses the design of an application specific MPSoC architecture dedicated to Multiple Target Tracking (MTT). This application has its utility in driver assistant s...
154
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DSD
2007
IEEE
16 years 19 days ago
2007
IEEE
In this paper, we present an efficient hardware architecture for real-time implementation of quarter-pixel accurate variable block size motion estimation for H.264 / MPEG4 Part 10...
156
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SIGSOFT
2008
ACM
16 years 7 months ago
2008
ACM
Synthesis of system configurations from a given set of features is an important and very challenging problem. This paper makes a step towards this goal by describing an efficient ...