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DAC
2010
ACM
15 years 6 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
CCGRID
2005
IEEE
16 years 1 days ago
A batch scheduler with high level components
In this article we present the design choices and the evaluation of a batch scheduler for large clusters, named OAR. This batch scheduler is based upon an original design that emp...
Nicolas Capit, Georges Da Costa, Yiannis Georgiou,...
CASES
2008
ACM
15 years 8 months ago
VESPA: portable, scalable, and flexible FPGA-based vector processors
While soft processors are increasingly common in FPGAbased embedded systems, it remains a challenge to scale their performance. We propose extending soft processor instruction set...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...
EDBT
2008
ACM
159views Database» more  EDBT 2008»
16 years 6 months ago
Automaton in or out: run-time plan optimization for XML stream processing
Many systems such as Tukwila and YFilter combine automaton and algebra techniques to process queries over tokenized XML streams. Typically in this architecture, an automaton is fi...
Hong Su, Elke A. Rundensteiner, Murali Mani
NETWORK
2006
84views more  NETWORK 2006»
15 years 6 months ago
VON: a scalable peer-to-peer network for virtual environments
: The scalability of large-scale networked virtual environments (NVEs) suchastoday's Massively Multiplayer Online Games (MMOGs) faces inherent limits imposed by the client-ser...
Shun-Yun Hu, Jui-Fa Chen, Tsu-Han Chen