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ICDE
2005
IEEE
124views Database» more  ICDE 2005»
16 years 7 months ago
Design, Implementation, and Evaluation of a Repairable Database Management System
Although conventional database management systems are designed to tolerate hardware and to a lesser extent even software errors, they cannot protect themselves against syntactical...
Tzi-cker Chiueh, Dhruv Pilania
TCOS
2010
15 years 27 days ago
Green Secure Processors: Towards Power-Efficient Secure Processor Design
With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the softwar...
Siddhartha Chhabra, Yan Solihin
ICCD
2004
IEEE
113views Hardware» more  ICCD 2004»
16 years 3 months ago
Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems
Abstract - This paper describes a communicationcentric design methodology that addresses the fundamental challenges induced by the emergence of truly heterogeneous Systems-on-Chip ...
Radu Marculescu, Diana Marculescu, Larry T. Pilegg...
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
16 years 5 days ago
An automated design flow for 3D microarchitecture evaluation
- Although the emerging three-dimensional integration technology can significantly reduce interconnect delay, chip area, and power dissipation in nanometer technologies, its impact...
Jason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Re...
WSC
1997
15 years 7 months ago
Efficient Instruction Cache Simulation and Execution Profiling with a Threaded-Code Interpreter
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
Peter S. Magnusson