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DATE
2008
IEEE
145views Hardware» more  DATE 2008»
16 years 1 months ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
WWW
2009
ACM
16 years 7 months ago
Why is the web loosely coupled?: a multi-faceted metric for service design
Loose coupling is often quoted as a desirable property of systems architectures. One of the main goals of building systems using Web technologies is to achieve loose coupling. How...
Cesare Pautasso, Erik Wilde
SIGCOMM
2010
ACM
15 years 6 months ago
Efficient error estimating coding: feasibility and applications
Motivated by recent emerging systems that can leverage partially correct packets in wireless networks, this paper investigates the novel concept of error estimating codes (EEC). W...
Binbin Chen, Ziling Zhou, Yuda Zhao, Haifeng Yu
DATE
2003
IEEE
104views Hardware» more  DATE 2003»
15 years 11 months ago
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
George Lykakis, N. Mouratidis, Kyriakos Vlachos, N...
WSC
2004
15 years 8 months ago
Enabling a Transforming Army at War: Analysis to Improve Logistics Network Efficiency and Effectiveness
This paper introduces and summarizes a comprehensive systems approach guiding an ongoing project addressing these significant challenges confronting logistics transformation. Curr...
Greg H. Parlier