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ICPP
2009
IEEE
16 years 1 months ago
Bank-aware Dynamic Cache Partitioning for Multicore Architectures
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...
Dimitris Kaseridis, Jeffrey Stuecheli, Lizy K. Joh...
DAC
2003
ACM
15 years 11 months ago
Improved indexing for cache miss reduction in embedded systems
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
Tony Givargis
DAC
2007
ACM
16 years 7 months ago
Period Optimization for Hard Real-time Distributed Automotive Systems
The complexity and physical distribution of modern active-safety automotive applications requires the use of distributed architectures. These architectures consist of multiple ele...
Abhijit Davare, Qi Zhu, Marco Di Natale, Claudio P...
DSD
2009
IEEE
88views Hardware» more  DSD 2009»
15 years 4 months ago
A Synthesisable Quasi-Delay Insensitive Result Forwarding Unit for an Asynchronous Processor
Abstract--The implementation of an efficient result forwarding unit for asynchronous processors faces the problem of the inherent lack of synchronisation between result producer an...
Luis A. Tarazona, Doug A. Edwards, Luis A. Plana
ASPLOS
2008
ACM
15 years 8 months ago
No "power" struggles: coordinated multi-level power management for the data center
Power delivery, electricity consumption, and heat management are becoming key challenges in data center environments. Several past solutions have individually evaluated different ...
Ramya Raghavendra, Parthasarathy Ranganathan, Vani...