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IOLTS
2005
IEEE
125views Hardware» more  IOLTS 2005»
16 years 2 days ago
Design of a Self Checking Reed Solomon Encoder
— In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in G...
Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco...
ICIP
2002
IEEE
16 years 8 months ago
Efficient representation and interactive streaming of high-resolution panoramic views
A new system for interactive streaming of high-resolution 360? panoramic views over the Internet is presented. The scene is represented very efficiently using MPEG-4 BIFS and disp...
Aljoscha Smolic, Carsten Grünheit, Thomas Wie...
ICDE
2003
IEEE
159views Database» more  ICDE 2003»
16 years 7 months ago
Scaling up the ALIAS Duplicate Elimination System
Duplicate elimination is an important stage in integrating data from multiple sources. The challenges involved are finding a robust deduplication function that can identify when t...
Sunita Sarawagi, Alok Kirpal
RSP
2003
IEEE
132views Control Systems» more  RSP 2003»
15 years 11 months ago
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
DATE
2007
IEEE
97views Hardware» more  DATE 2007»
16 years 24 days ago
Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
Abbas Sheibanyrad, Ivan Miro Panades, Alain Greine...