312 search results - page 37 / 63 » Architectural approaches to reduce leakage energy in caches |
146
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MICRO
2007
IEEE
16 years 12 days ago
2007
IEEE
The microarchitectural design space of a new processor is too large for an architect to evaluate in its entirety. Even with the use of statistical simulation, evaluation of a sing...
153
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PDP
2010
IEEE
15 years 10 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
177
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GECCO
2004
Springer
15 years 11 months ago
2004
Springer
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
163
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ISLPED
2003
ACM
15 years 11 months ago
2003
ACM
Tag comparison elimination (TCE) is an effective approach to reduce I-cache energy. Current research focuses on finding good tradeoffs between hardware cost and percentage of comp...
164
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EENERGY
2010
15 years 9 months ago
2010
Power consumption of the Information and Communication Technology sector (ICT) has recently become a key challenge. In particular, actions to improve energy-efficiency of Internet...