312 search results - page 14 / 63 » Architectural approaches to reduce leakage energy in caches |
175
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GLVLSI
2010
IEEE
15 years 11 months ago
2010
IEEE
Flash Memory is a desirable candidate for main memory replacement in embedded systems due to its low leakage power consumption, higher density and non-volatility characteristics. ...
235
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HPCA
2004
IEEE
16 years 6 months ago
2004
IEEE
Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixe...
151
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DATE
2007
IEEE
16 years 13 days ago
2007
IEEE
Partitioning a memory into multiple blocks that can be independently accessed is a widely used technique to reduce its dynamic power. For embedded systems, its benefits can be ev...
168
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HPCA
2005
IEEE
16 years 6 months ago
2005
IEEE
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
134
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ISLPED
1999
ACM
15 years 10 months ago
1999
ACM
This paper proposes a new approach using way prediction for achieving high performance and low energy consumption of set-associative caches. By accessing only a single cache way p...