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DATE
2009
IEEE
113views Hardware» more  DATE 2009»
16 years 28 days ago
System-level process variability analysis and mitigation for 3D MPSoCs
Abstract—While prior research has extensively evaluated the performance advantage of moving from a 2D to a 3D design style, the impact of process parameter variations on 3D desig...
Siddharth Garg, Diana Marculescu
CSUR
2006
147views more  CSUR 2006»
15 years 6 months ago
A survey of research and practices of Network-on-chip
resents a perspective on existing NoC research. We define the following abstractions: system, network adapter, network, and link to explain and structure the fundamental concepts. ...
Tobias Bjerregaard, Shankar Mahadevan
SACMAT
2009
ACM
16 years 21 days ago
Supporting RBAC with XACML+OWL
XACML does not natively support RBAC and even the specialized XACML profiles are not able to support many relevant constraints such as static and dynamic separation of duty. Exte...
Rodolfo Ferrini, Elisa Bertino
RTAS
2005
IEEE
15 years 11 months ago
Timing Analysis for Sensor Network Nodes of the Atmega Processor Family
Low-end embedded architectures, such as sensor nodes, have become popular in diverse fields, many of which impose real-time constraints. Currently, the Atmel Atmega processor fam...
Sibin Mohan, Frank Mueller, David B. Whalley, Chri...
WSC
1997
15 years 7 months ago
Simulation of Bulk Flow and High Speed Operations
Simulation modeling can be highly effective for solving problems found in the food, beverage, consumer products, and pharmaceutical industries. The flow of material or fluid in th...
Andrew J. Siprelle, Richard A. Phelps