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163
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HPCA
2006
IEEE
16 years 7 months ago
2006
IEEE
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
157
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HPCA
2006
IEEE
16 years 7 months ago
2006
IEEE
Building processors with large instruction windows has been proposed as a mechanism for overcoming the memory wall, but finding a feasible and implementable design has been an elu...
152
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HPCA
2003
IEEE
16 years 7 months ago
2003
IEEE
To sustain instruction throughput rates in more aggressively clocked microarchitectures, microarchitects have incorporated larger and more complex branch predictors into their des...
179
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HPCA
2001
IEEE
16 years 7 months ago
2001
IEEE
This paper presents a new method for branch prediction. The key idea is to use one of the simplest possible neural networks, the perceptron as an alternative to the commonly used ...
171
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OSDI
2008
ACM
16 years 7 months ago
2008
ACM
Active research is being conducted in reducing power consumption of all the components of the Internet. To that end, we propose schemes for power reduction in network switches - T...