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ICCD
2008
IEEE
116views Hardware» more  ICCD 2008»
16 years 3 months ago
Prototyping a hybrid main memory using a virtual machine monitor
— We use a novel virtualization-based approach for computer architecture performance analysis. We present a case study analyzing a hypothetical hybrid main memory, which consists...
Dong Ye, Aravind Pavuluri, Carl A. Waldspurger, Br...
ICCD
2006
IEEE
182views Hardware» more  ICCD 2006»
16 years 3 months ago
A performance and power analysis of WK-Recursive and Mesh Networks for Network-on-Chips
—Network-on-Chip (NoC) has been proposed as an attractive alternative to traditional dedicated wires to achieve high performance and modularity. Power efficiency is one of the mo...
Dara Rahmati, Abbas Eslami Kiasari, Shaahin Hessab...
HIPEAC
2009
Springer
16 years 1 months ago
Mapping and Synchronizing Streaming Applications on Cell Processors
Developing streaming applications on heterogenous multi-processor architectures like the Cell is difficult. Currently, application developers need to know about hardware details t...
Maik Nijhuis, Herbert Bos, Henri E. Bal, Cé...
ICS
2009
Tsinghua U.
16 years 1 months ago
Dynamic cache clustering for chip multiprocessors
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
SBACPAD
2008
IEEE
206views Hardware» more  SBACPAD 2008»
16 years 1 months ago
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
Thiago S. M. C. de Farias, Mozart W. S. Almeida, J...