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IEEEPACT
2000
IEEE
15 years 11 months ago
aSOC: A Scalable, Single-Chip Communications Architecture
As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with onchip system-leve...
Jian Liang, Sriram Swaminathan, Russell Tessier
IFIP
2001
Springer
15 years 11 months ago
A Standardized Co-simulation Backbone
: In the field of co-simulation, the construction of a bridge between different simulators and the solution of problems like synchronization and data translation are some of the ma...
Braulio Adriano de Mello, Flávio Rech Wagne...
GI
2004
Springer
16 years 2 days ago
Dynamic information fusion for genome annotation
: The need for demand-driven and scaleable integration of heterogeneous data sources is inherent to the process of genome annotation. In this paper we describe the Gene-EYe archite...
Heiko Müller, Peter Rieger, Katja Tham, Johan...
VLSISP
2002
93views more  VLSISP 2002»
15 years 6 months ago
Efficient VLSI Architectures for Multiuser Channel Estimation in Wireless Base-Station Receivers
Abstract. This paper presents a reduced-complexity, fixed-point algorithm and efficient real-time VLSI architectures for multiuser channel estimation, one of the core baseband proc...
Sridhar Rajagopal, Srikrishna Bhashyam, Joseph R. ...
ACSW
2007
15 years 8 months ago
The motivation and proposition of a privacy-enhancing architecture for operational databases
To date, research has focussed on privacy from a wide perspective, enabling organisations to implement various technologies that contribute to privacy protection. However, in such...
Kirsten Wahlstrom, Gerald Quirchmayr