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» Architectural Specifications in CASL
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DAC
2006
ACM
16 years 7 months ago
An efficient and versatile scheduling algorithm based on SDC formulation
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
Jason Cong, Zhiru Zhang
WWW
2004
ACM
16 years 7 months ago
OntoWeaver-S: Integrating Web Services into Data-Intensive Web Sites
Designing web sites is a complex task. Ad-hoc rapid prototyping easily leads to unsatisfactory results, e.g. poor maintainability and extensibility. However, existing web design f...
Yuangui Lei, Enrico Motta, John Domingue
PPOPP
2009
ACM
16 years 7 months ago
Exploiting global optimizations for openmp programs in the openuh compiler
The advent of new parallel architectures has increased the need for parallel optimizing compilers to assist developers in creating efficient code. OpenUH is a state-of-the-art opt...
Lei Huang, Deepak Eachempati, Marcus W. Hervey, Ba...
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
16 years 6 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
VLSID
2003
IEEE
78views VLSI» more  VLSID 2003»
16 years 6 months ago
Interface Design Techniques for Single-Chip Systems
This paper quantifies the performance of typical functional unit interface designs in single-chip systems. We introduce a specific equation to guide the design of optimal module i...
Robert H. Bell Jr., Lizy Kurian John