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» Architectural Specifications in CASL
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ISVLSI
2003
IEEE
118views VLSI» more  ISVLSI 2003»
15 years 11 months ago
Networks-On-Chip: The Quest for On-Chip Fault-Tolerant Communication
In this paper, we discuss the possibility of achieving onchip fault-tolerant communication based on a new communication paradigm called stochastic communication. Specifically, for...
Radu Marculescu
DAC
2000
ACM
15 years 11 months ago
CYCLONE: automated design and layout of RF LC-oscillators
This paper presents an automated, layout-aware RF LCoscillator design tool, called CYCLONE that delivers an accurate and optimal LC-oscillator design, from specification to layout...
Carl De Ranter, B. De Muer, Geert Van der Plas, Pe...
DAC
1994
ACM
15 years 10 months ago
Optimizing Resource Utilization and Testability Using Hot Potato Techniques
This paper introduces hot potato high level synthesis transformation techniques. These techniques add deflection operations in a computation in such a way that a specific goal is ...
Miodrag Potkonjak, Sujit Dey
APCCAS
2006
IEEE
290views Hardware» more  APCCAS 2006»
15 years 10 months ago
An Improved Soft-Input CAVLC Decoder for Mobile Communication Applications
in this paper, a new CAVLC decoding architecture with a soft-input design concept is proposed. We introduce the soft-decision information to localize the erroneous position at macr...
Tsu-Ming Liu, Chen-Yi Lee
AMAST
2008
Springer
15 years 8 months ago
The Verification of the On-Chip COMA Cache Coherence Protocol
This paper gives a correctness proof for the on-chip COMA cache coherence protocol that supports the Microgrid of microtheaded architecture, a multi-core architecture capable of in...
Thuy Duong Vu, Li Zhang, Chris R. Jesshope