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» Architectural Specifications in CASL
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SIGSOFT
2008
ACM
16 years 7 months ago
Explicit exception handling variability in component-based product line architectures
Separation of concerns is one of the overarching goals of exception handling in order to keep separate normal and exceptional behaviour of a software system. In the context of a s...
Ivo Augusto Bertoncello, Marcelo Oliveira Dias, Pa...
HPCA
2009
IEEE
16 years 7 months ago
Prediction router: Yet another low latency on-chip router architecture
Network-on-Chips (NoCs) are quite latency sensitive, since their communication latency strongly affects the application performance on recent many-core architectures. To reduce th...
Hiroki Matsutani, Michihiro Koibuchi, Hideharu Ama...
ICCCN
2008
IEEE
16 years 29 days ago
A Structured Hardware/Software Architecture for Embedded Sensor Nodes
—Owing to the limited requirement for sensor processing in early networked sensor nodes, embedded software was generally built around the communication stack. Modern sensor nodes...
Geoff V. Merrett, Alex S. Weddell, Nick R. Harris,...
ISQED
2007
IEEE
160views Hardware» more  ISQED 2007»
16 years 24 days ago
On-Chip Inductance in X Architecture Enabled Design
The inductance effects become significant for sub-100nm process designs due to increasing interconnect lengths, lower interconnect resistance values and fast signal transition tim...
Santosh Shah, Arani Sinha, Li Song, Narain D. Aror...
DSN
2004
IEEE
15 years 10 months ago
The Recursive NanoBox Processor Grid: A Reliable System Architecture for Unreliable Nanotechnology Devices
Advanced molecular nanotechnology devices are expected to have exceedingly high transient fault rates and large numbers of inherent device defects compared to conventional CMOS de...
A. J. KleinOsowski, Kevin KleinOsowski, Vijay Rang...