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DAC
2005
ACM
16 years 7 months ago
Designing logic circuits for probabilistic computation in the presence of noise
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
VEE
2010
ACM
218views Virtualization» more  VEE 2010»
16 years 1 months ago
Improving compiler-runtime separation with XIR
Intense research on virtual machines has highlighted the need for flexible software architectures that allow quick evaluation of new design and implementation techniques. The inte...
Ben Titzer, Thomas Würthinger, Doug Simon, Ma...
IPPS
2007
IEEE
16 years 1 months ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao
CODES
2004
IEEE
15 years 10 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
ISARCS
2010
240views Hardware» more  ISARCS 2010»
15 years 8 months ago
Engineering a Distributed e-Voting System Architecture: Meeting Critical Requirements
Voting is a critical component of any democratic process; and electronic voting systems should be developed following best practices for critical system development. E-voting has i...
J. Paul Gibson, Eric Lallet, Jean-Luc Raffy