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ISCAS
2011
IEEE
288views Hardware» more  ISCAS 2011»
14 years 10 months ago
Multi-layer parallel decoding algorithm and vlsi architecture for quasi-cyclic LDPC codes
—We propose a multi-layer parallel decoding algorithm and VLSI architecture for decoding of structured quasi-cyclic low-density parity-check codes. In the conventional layered de...
Yang Sun, Guohui Wang, Joseph R. Cavallaro
HICSS
2006
IEEE
282views Biometrics» more  HICSS 2006»
16 years 24 days ago
Knowledge Management System for Emergency Preparedness: An Action Research Study
This paper is about the design and implementation of an information system, using Wiki technology to improve the emergency preparedness efforts of the Claremont University Consort...
Murali Raman, Terry Ryan, Lorne Olfman
TVLSI
2002
78views more  TVLSI 2002»
15 years 6 months ago
Managing on-chip inductive effects
With process technology and functional integration advancing steadily, chips are continuing to grow in area while critical dimensions are shrinking. This has led to the emergence o...
Yehia Massoud, Steve S. Majors, Jamil Kawa, Tareq ...
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
16 years 23 days ago
SODA: A Low-power Architecture For Software Radio
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
OOIS
2000
Springer
15 years 10 months ago
Architecture as Object Models of Software
ABSTRACT: Typically, we think of modelling some business domain when we see the word modelling in the context of software -- some business domain is not understood and therefore we...
Eyðun Eli Jacobsen