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ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
16 years 1 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
16 years 3 months ago
Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques
— The need to perform power analysis in the early stages of the design process has become critical as power has become a major design constraint. Embedded and highperformance mic...
Xiaoyao Liang, Kerem Turgay, David Brooks
VLSID
2008
IEEE
142views VLSI» more  VLSID 2008»
16 years 1 months ago
Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
195
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ICWS
2003
IEEE
15 years 8 months ago
A Stateless Network Architecture for Inter-Enterprise Authentication, Authorization and Accounting
Abstract Providing network infrastructure for authentication, authorization and accounting (AAA) functionalities required by inter-enterprise business applications operating over t...
H. T. Kung, F. Zhu, M. Iansiti
CHI
2009
ACM
16 years 7 months ago
DICE: designing conference rooms for usability
One of the core challenges now facing smart rooms is supporting realistic, everyday activities. While much research has been done to push forward the frontiers of novel interactio...
Gene Golovchinsky, Pernilla Qvarfordt, Bill van Me...