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» Architectural Considerations with Distributed Computing
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HPCA
2005
IEEE
16 years 7 months ago
Multithreaded Value Prediction
This paper introduces a novel technique which leverages value prediction and multithreading on a simultaneous multithreading processor to achieve higher performance in a single th...
Nathan Tuck, Dean M. Tullsen
HPCA
2004
IEEE
16 years 7 months ago
Exploiting Prediction to Reduce Power on Buses
We investigate coding techniques to reduce the energy consumed by on-chip buses in a microprocessor. We explore several simple coding schemes and simulate them using a modified Si...
Victor Wen, Mark Whitney, Yatish Patel, John Kubia...
HPCA
2003
IEEE
16 years 7 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M...
HPCA
2001
IEEE
16 years 7 months ago
Performance of Hardware Compressed Main Memory
A new memory subsystem called Memory Expansion Technology (MXT) has been built for compressing main memory contents. MXT effectively doubles the physically available memory. This ...
Bülent Abali, Dan E. Poff, Hubertus Franke, T...
HPCA
2001
IEEE
16 years 7 months ago
DRAM Energy Management Using Software and Hardware Directed Power Mode Control
While there have been several studies and proposals for energy conservation for CPUs and peripherals, energy optimization techniques for selective operating mode control of DRAMs ...
Victor Delaluz, Mahmut T. Kandemir, Narayanan Vija...