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187
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ICS
1999
Tsinghua U.
15 years 11 months ago
1999
Tsinghua U.
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
205
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HPCA
1998
IEEE
15 years 11 months ago
1998
IEEE
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
204
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IPPS
1997
IEEE
15 years 11 months ago
1997
IEEE
We present a customizable simulator called netsim for high-performance point-to-point workstation networks that is accurate enough to be used for application-level performance ana...
162
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IPPS
1996
IEEE
15 years 11 months ago
1996
IEEE
The Data Diffusion Machine is a scalable virtual shared memory architecture. A hierarchical network is used to ensure that all data can be located in a time bounded by O(logp), wh...
207
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JSSPP
1997
Springer
1997
Springer
An Experimental Evaluation of Processor Pool-Based Scheduling for Shared-Memory NUMA Multiprocessors
15 years 11 months ago
In this paper we describe the design, implementation and experimental evaluation of a technique for operating system schedulers called processor pool-based scheduling [51]. Our tec...