Sciweavers

4885 search results - page 557 / 977
» Architectural Considerations with Distributed Computing
Sort
View
SAC
2005
ACM
16 years 10 days ago
Performance analysis framework for large software-intensive systems with a message passing paradigm
The launch of new features for mobile phones is increasing and the product life cycle symmetrically decreasing in duration as higher levels of sophistication are reached. Therefor...
Christian Del Rosso
ICS
2009
Tsinghua U.
16 years 1 months ago
Dynamic cache clustering for chip multiprocessors
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
IPPS
2009
IEEE
16 years 1 months ago
Exploring the effect of block shapes on the performance of sparse kernels
In this paper we explore the impact of the block shape on blocked and vectorized versions of the Sparse Matrix-Vector Multiplication (SpMV) kernel and build upon previous work by ...
Vasileios Karakasis, Georgios I. Goumas, Nectarios...
180
Voted
IPPS
2007
IEEE
16 years 1 months ago
Power-Aware Routing for Well-Nested Communications On The Circuit Switched Tree
Although algorithms that employ dynamic reconfiguration are extremely fast, they need the underlying architecture to change structure very rapidly, possibly at each step of the c...
Hatem M. El-Boghdadi
IPPS
2006
IEEE
16 years 24 days ago
An adaptive system-on-chip for network applications
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...