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DAC
2005
ACM
16 years 7 months ago
Power optimal dual-Vdd buffered tree considering buffer stations and blockages
This paper presents the first in-depth study on applying dual Vdd buffers to buffer insertion and multi-sink buffered tree construction for power minimization under delay constrai...
King Ho Tam, Lei He
VLSID
2005
IEEE
100views VLSI» more  VLSID 2005»
16 years 7 months ago
A Fast Buffered Routing Tree Construction Algorithm under Accurate Delay Model
Buffer insertion method plays a great role in modern VLSI design. Many buffer insertion algorithms have been proposed in recent years. However, most of them used simplified delay ...
Yibo Wang, Yici Cai, Xianlong Hong
VLSID
2003
IEEE
78views VLSI» more  VLSID 2003»
16 years 7 months ago
Interface Design Techniques for Single-Chip Systems
This paper quantifies the performance of typical functional unit interface designs in single-chip systems. We introduce a specific equation to guide the design of optimal module i...
Robert H. Bell Jr., Lizy Kurian John
VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
16 years 7 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
VLSID
2002
IEEE
92views VLSI» more  VLSID 2002»
16 years 7 months ago
Low Power Solution for Wireless Applications
Low standby power dissipation is the primary need for most of the wireless applications for prolonged battery life. Traditionally ASIC solutions currently address either high densi...
Sornavalli Ramanathan, Rituparna Mandal