Sciweavers

3934 search results - page 472 / 787
» Approximate Schedulability Analysis
Sort
View
DATE
1999
IEEE
147views Hardware» more  DATE 1999»
15 years 11 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
IEEEPACT
1999
IEEE
15 years 11 months ago
Predicated Static Single Assignment
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
Lori Carter, Beth Simon, Brad Calder, Larry Carter...
RSP
1999
IEEE
125views Control Systems» more  RSP 1999»
15 years 11 months ago
Extended Synchronous Dataflow for Efficient DSP System Prototyping
Though synchronous dataflow (SDF) graph has been a successful input specification language for digital signal processing (DSP) applications, lack of support for global states makes...
Chanik Park, JaeWoong Chung, Soonhoi Ha
ASAP
1997
IEEE
144views Hardware» more  ASAP 1997»
15 years 11 months ago
Automatic data mapping of signal processing applications
This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applicati...
Corinne Ancourt, Denis Barthou, Christophe Guettie...
CCGRID
2004
IEEE
15 years 10 months ago
Predicting job start times on clusters
In a Computational Grid which consists of many computer clusters, job start time predictions are useful to guide resource selections and balance the workload distribution. However...
Hui Li, David L. Groep, Jeffrey Templon, Lex Wolte...