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MASCOTS
2004
15 years 8 months ago
Performance Engineering with the UML Profile for Schedulability, Performance and Time: A Case Study
We describe the application of a performance engineering methodology based on UML diagrams with annotations taken from the Profile for Schedulability, Performance and Time. The me...
Andrew J. Bennett, A. J. Field
VLSID
2008
IEEE
151views VLSI» more  VLSID 2008»
16 years 7 months ago
Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
Worst-case execution time (WCET) analysis and, in general, the predictability of real-time applications implemented on multiprocessor systems has been addressed only in very restri...
Alexandru Andrei, Petru Eles, Zebo Peng, Jakob Ros...
CC
2006
Springer
182views System Software» more  CC 2006»
15 years 10 months ago
Selective Runtime Memory Disambiguation in a Dynamic Binary Translator
Abstract. Alias analysis, traditionally performed statically, is unsuited for a dynamic binary translator (DBT) due to incomplete control-flow information and the high complexity o...
Bolei Guo, Youfeng Wu, Cheng Wang, Matthew J. Brid...
ICCAD
2004
IEEE
124views Hardware» more  ICCAD 2004»
16 years 3 months ago
Architectural-level synthesis of digital microfluidics-based biochips
Microfluidics-based biochips offer a promising platform for massively parallel DNA analysis, automated drug discovery, and real-time biomolecular recognition. Current techniques f...
Fei Su, Krishnendu Chakrabarty
AINA
2005
IEEE
16 years 5 days ago
3D-VOQ Switch Design and Evaluation
Input Buffered Switches with Virtual Output Queues(VOQ) design to avoid Head-Of-Line problems, is a primary design of switches that can be scalable to very high speeds. However, t...
Ding-Jyh Tsaur, Xian-Yang Lu, Chin-Chi Wu, Woei Li...