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ARITH
2005
IEEE
16 years 2 days ago
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
Silvia M. Müller, Christian Jacobi 0002, Hwa-...
CODES
2005
IEEE
16 years 2 days ago
Satisfying real-time constraints with custom instructions
Instruction-set extensible processors allow an existing processor core to be extended with application-specific custom instructions. In this paper, we explore a novel application...
Pan Yu, Tulika Mitra
DAC
2005
ACM
15 years 8 months ago
Multi-frequency wrapper design and optimization for embedded cores under average power constraints
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty
CSL
2008
Springer
15 years 8 months ago
Fractional Collections with Cardinality Bounds, and Mixed Linear Arithmetic with Stars
Abstract. We present decision procedures for logical constraints involving collections such as sets, multisets, and fuzzy sets. Element membership in our collections is given by ch...
Ruzica Piskac, Viktor Kuncak
NIPS
2008
15 years 8 months ago
MDPs with Non-Deterministic Policies
Markov Decision Processes (MDPs) have been extensively studied and used in the context of planning and decision-making, and many methods exist to find the optimal policy for probl...
Mahdi Milani Fard, Joelle Pineau