3256 search results - page 161 / 652 » Applications of Formal Methods to System Design and Verifica... |
187
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ASE
2005
15 years 6 months ago
2005
Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...
208
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CORR
2007
Springer
15 years 6 months ago
2007
Springer
This paper presents a methodology to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall performance ...
218
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IFIP
2001
Springer
15 years 11 months ago
2001
Springer
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
165
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IWSSD
2000
IEEE
15 years 10 months ago
2000
IEEE
We seek to facilitate development of high quality software designs and architectures by using rigorous process definitions to guide application of the complex structure of relati...
181
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IFM
2010
Springer
15 years 4 months ago
2010
Springer
This paper presents initial results of research aimed at developing methods and tools for multidisciplinary collaborative development of dependable embedded systems. We focus on th...