4764 search results - page 817 / 953 » Applications of Error-Control Coding |
165
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SCCC
1999
IEEE
15 years 10 months ago
1999
IEEE
A model was introduced in [Fraga97] for integrating replication techniques in heterogeneous systems. The model adopts a reflective structure based on the meta-object approach [10]...
150
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SP
1999
IEEE
15 years 10 months ago
1999
IEEE
A TCB and security kernel architecture for supporting multi-threaded, queue-driven transaction processing applications in a multilevel secure environment is presented. Our design ...
216
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VLSID
1999
IEEE
15 years 10 months ago
1999
IEEE
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
178
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ICS
1999
Tsinghua U.
15 years 10 months ago
1999
Tsinghua U.
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
175
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GLVLSI
1998
IEEE
15 years 10 months ago
1998
IEEE
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...