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HPCA
2000
IEEE
15 years 11 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
HPCA
2000
IEEE
15 years 11 months ago
A Prefetching Technique for Irregular Accesses to Linked Data Structures
Prefetching offers the potential to improve the performance of linked data structure (LDS) traversals. However, previously proposed prefetching methods only work well when there i...
Magnus Karlsson, Fredrik Dahlgren, Per Stenstr&oum...
HPDC
2000
IEEE
15 years 11 months ago
Creating Large Scale Database Servers
The BaBar experiment at the Stanford Linear Accelerator Center (SLAC) is designed to perform a high precision investigation of the decays of the B-meson produced from electron-pos...
Jacek Becla, Andrew Hanushevsky
HPDC
2000
IEEE
15 years 11 months ago
Performance Evaluation of a Firewall-Compliant Globus-based Wide-Area Cluster System
In this paper, we present a performance evaluation of a wide-area cluster system based on a rewallenabled Globus metacomputing toolkit. In order to establish communication links ...
Yoshio Tanaka, Motonori Hirano, Mitsuhisa Sato, Hi...
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
15 years 11 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāˆ’specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
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