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ISSS
1996
IEEE
123views Hardware» more  ISSS 1996»
15 years 11 months ago
Memory Organization for Improved Data Cache Performance in Embedded Processors
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
CODES
2005
IEEE
15 years 9 months ago
Automated data cache placement for embedded VLIW ASIPs
Memory bandwidth issues present a formidable bottleneck to accelerating embedded applications, particularly data bandwidth for multiple-issue VLIW processors. Providing an efficie...
Paul Morgan, Richard Taylor, Japheth Hossell, Geor...
ISEMANTICS
2010
15 years 8 months ago
Geographical linked data: a Spanish use case
We present the process that has been followed for the development of an application that makes use of several heterogeneous Spanish public datasets that are related to administrat...
Alexander de León, Victor Saquicela, Luis M...
CAINE
2009
15 years 8 months ago
Comparison of JSON and XML Data Interchange Formats: A Case Study
This paper compares two data interchange formats currently used by industry applications; XML and JSON. The choice of an adequate data interchange format can have significant cons...
Nurzhan Nurseitov, Michael Paulson, Randall Reynol...
CORR
2010
Springer
107views Education» more  CORR 2010»
15 years 7 months ago
Fast GPGPU Data Rearrangement Kernels using CUDA
: Many high performance computing algorithms are bandwidth limited, hence the need for optimal data rearrangement kernels as well as their easy integration into the rest of the app...
Michael Bader, Hans-Joachim Bungartz, Dheevatsa Mu...