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ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
16 years 10 days ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
IWPSE
2005
IEEE
16 years 10 days ago
EvoLens: Lens-View Visualizations of Evolution Data
Visualizing software evolution is essential for identifying design erosions that have occurred over the past releases. Making evolutionary aspects explicit via visual representati...
Jacek Ratzinger, Michael Fischer, Harald Gall
RTAS
2005
IEEE
16 years 10 days ago
Timing Analysis for Sensor Network Nodes of the Atmega Processor Family
Low-end embedded architectures, such as sensor nodes, have become popular in diverse fields, many of which impose real-time constraints. Currently, the Atmel Atmega processor fam...
Sibin Mohan, Frank Mueller, David B. Whalley, Chri...
RTSS
2005
IEEE
16 years 10 days ago
ParaScale: Exploiting Parametric Timing Analysis for Real-Time Schedulers and Dynamic Voltage Scaling
Static timing analysis safely bounds worst-case execution times to determine if tasks can meet their deadlines in hard real-time systems. However, conventional timing analysis req...
Sibin Mohan, Frank Mueller, William Hawkins, Micha...
TPHOL
2005
IEEE
16 years 10 days ago
A HOL Theory of Euclidean Space
We describe a formalization of the elementary algebra, topology and analysis of finite-dimensional Euclidean space in the HOL Light theorem prover. (Euclidean space is RN with the...
John Harrison
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