Sciweavers

2752 search results - page 269 / 551
» Application performance in the QLinux multimedia operating s...
Sort
View
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
16 years 6 days ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
SIGMOD
2011
ACM
442views Database» more  SIGMOD 2011»
14 years 9 months ago
ArrayStore: a storage manager for complex parallel array processing
We present the design, implementation, and evaluation of ArrayStore, a new storage manager for complex, parallel array processing. ArrayStore builds on prior work in the area of m...
Emad Soroush, Magdalena Balazinska, Daniel L. Wang
PPOPP
1993
ACM
15 years 10 months ago
Integrating Message-Passing and Shared-Memory: Early Experience
This paper discusses some of the issues involved in implementing a shared-address space programming model on large-scale, distributed-memory multiprocessors. While such a programm...
David A. Kranz, Kirk L. Johnson, Anant Agarwal, Jo...
SOSP
1993
ACM
15 years 8 months ago
Improving IPC by Kernel Design
Inter-process communication (ipc) has to be fast and e ective, otherwise programmers will not use remote procedure calls(RPC),multithreadingand multitasking adequately. Thus ipc p...
Jochen Liedtke
IPCCC
2006
IEEE
16 years 20 days ago
OS-aware tuning: improving instruction cache energy efficiency on system workloads
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
Tao Li, Lizy K. John