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» Application of Reduce Order Modeling to Time Parallelization
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ICC
2009
IEEE
118views Communications» more  ICC 2009»
16 years 27 days ago
A First Order Logic Security Verification Model for SIP
: It is well known that no security mechanism can provide full protection against a potential attack. There is always a possibility that a security incident may happen, mainly as a...
Dimitris Geneiatakis, Costas Lambrinoudakis, Georg...
ICCAD
1995
IEEE
108views Hardware» more  ICCAD 1995»
15 years 9 months ago
Partitioning and reduction of RC interconnect networks based on scattering parameter macromodels
This paper presents a linear time algorithm to reduce a large RC interconnect network into subnetworks which are approximated with lower order equivalent RC circuits. The number o...
Haifang Liao, Wayne Wei-Ming Dai
ISPAN
1999
IEEE
15 years 10 months ago
Using Stochastic Intervals to Predict Application Behavior on Contended Resources
Current distributed parallel platforms can provide the resources required to execute a scientific application efficiently. However, when these platforms are shared by multiple use...
Jennifer M. Schopf, Francine Berman
ICTAC
2005
Springer
15 years 11 months ago
Symbolic Model Checking of Finite Precision Timed Automata
Abstract. This paper introduces the notion of finite precision timed automata (FPTAs) and proposes a data structure to represent its symbolic states. To reduce the state space, FP...
Rongjie Yan, Guangyuan Li, Zhisong Tang
AMEC
2004
Springer
15 years 11 months ago
Agents' Strategies for the Dual Parallel Search in Partnership Formation Applications
In many two-sided search applications, autonomous agents can enjoy the advantage of parallel search, powered by their ability to handle an enormous amount of information, in a shor...
David Sarne, Sarit Kraus