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ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
15 years 10 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
15 years 11 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
LCTRTS
2007
Springer
16 years 4 days ago
Enabling compiler flow for embedded VLIW DSP processors with distributed register files
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Y...
RTCSA
2006
IEEE
16 years 16 hour ago
Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu...
ICMCS
2009
IEEE
102views Multimedia» more  ICMCS 2009»
15 years 3 months ago
Scalable HMM based inference engine in large vocabulary continuous speech recognition
Parallel scalability allows an application to efficiently utilize an increasing number of processing elements. In this paper we explore a design space for parallel scalability for...
Jike Chong, Kisun You, Youngmin Yi, Ekaterina Goni...