We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
Abstract— In this paper, we develop methods to “sample” a large real network into a small realistic graph. Although topology modeling has received a lot attention lately, it ...
Abstract--This paper contains a modern vision of the parallelization techniques used for evolutionary algorithms (EAs). The work is motivated by two fundamental facts: first, the d...
In this paper we study the use of vehicles as sensors in a "vehicular sensor network," a new network paradigm that is critical for gathering valuable information in urba...
Uichin Lee, Eugenio Magistretti, Biao Zhou, Mario ...
Several published reports show that instancebased learning algorithms yield high classification accuracies and have low storage requirements during supervised learning application...