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ASPLOS
2008
ACM
15 years 8 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
HPCA
2006
IEEE
16 years 7 months ago
Construction and use of linear regression models for processor performance analysis
Processor architects have a challenging task of evaluating a large design space consisting of several interacting parameters and optimizations. In order to assist architects in ma...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
ECBS
1996
IEEE
155views Hardware» more  ECBS 1996»
15 years 11 months ago
Model-Integrated Program Synthesis Environment
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
Janos Sztipanovits, Gabor Karsai, Hubertus Franke
MEMOCODE
2006
IEEE
16 years 26 days ago
A scenario-aware data flow model for combined long-run average and worst-case performance analysis
Data flow models are used for specifying and analysing signal processing and streaming applications. However, traditional data flow models are either not capable of expressing t...
Bart D. Theelen, Marc Geilen, Twan Basten, Jeroen ...
CCGRID
2005
IEEE
16 years 14 days ago
Data grid performance analysis through study of replication and storage infrastructure parameters
Running Data Grid applications such as High Energy Nuclear Physics (HENP) and weather modelling experiments involves working with huge data sets possibly of hundreds of Terabytes ...
Ernest Sithole, Gerard P. Parr, Sally I. McClean