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SWAT
1992
Springer
101views Algorithms» more  SWAT 1992»
15 years 10 months ago
Parallel Algorithms for Priority Queue Operations
This paper presents parallel algorithms for priority queue operations on a p-processor EREWPRAM. The algorithms are based on a new data structure, the Min-path Heap (MH), which is...
Maria Cristina Pinotti, Geppino Pucci
TPDS
1998
114views more  TPDS 1998»
15 years 6 months ago
On the Automatic Parallelization of the Perfect Benchmarks
We present a set of advanced program parallelization techniques that are able to signi cantly improve the performance of application programs. We present evidence for this improve...
Rudolf Eigenmann, Jay Hoeflinger, David A. Padua
HPCA
2000
IEEE
15 years 11 months ago
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...
ICS
1995
Tsinghua U.
15 years 10 months ago
Idiom Recognition in the Polaris Parallelizing Compiler
The elimination of induction variables and the parallelization of reductions in FORTRAN programs have been shown to be integral to performance improvement on parallel computers 7,...
William M. Pottenger, Rudolf Eigenmann
CORR
2010
Springer
196views Education» more  CORR 2010»
15 years 6 months ago
Low Power Reversible Parallel Binary Adder/Subtractor
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computin...
H. G. Rangaraju, U. Venugopal, K. N. Muralidhara, ...