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ATS
2003
IEEE
110views Hardware» more  ATS 2003»
15 years 11 months ago
Chip-Level Diagnostic Strategy for Full-Scan Designs with Multiple Faults
Fault diagnosis of full-scan designs has been progressed significantly. However, most existing techniques are aimed at a logic block with a single fault. Strategies on top of thes...
Yu-Chiun Lin, Shi-Yu Huang
ICPP
1993
IEEE
15 years 10 months ago
Dependence Analysis and Architecture Design for Bit-Level Algorithms
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...
Weijia Shang, Benjamin W. Wah
KR
1994
Springer
15 years 10 months ago
An Ontology of Meta-Level Categories
We focus in this paper on some meta-level ontological distinctions among unary predicates, like those between concepts and assertional properties. Three are the main contributions...
Nicola Guarino, Massimiliano Carrara, Pierdaniele ...
FDL
2004
IEEE
15 years 10 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
USS
2008
15 years 8 months ago
FLAME: A Flow-Level Anomaly Modeling Engine
There are several remaining open questions in the area of flow-based anomaly detection, e.g., how to do meaningful evaluations of anomaly detection mechanisms; how to get conclusi...
Daniela Brauckhoff, Arno Wagner, Martin May