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ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
15 years 11 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
ISSS
2002
IEEE
103views Hardware» more  ISSS 2002»
15 years 11 months ago
A Symbolic Approach for the Combined Solution of Scheduling and Allocation
Scheduling is widely recognized as a very important step in highlevel synthesis. Nevertheless, it is usually done without taking into account the effects on the actual hardware im...
Luciano Lavagno, Mihai T. Lazarescu, Stefano Quer,...
191
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MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
15 years 11 months ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
CIAC
2010
Springer
252views Algorithms» more  CIAC 2010»
15 years 11 months ago
On the Number of Higher Order Delaunay Triangulations
Higher order Delaunay triangulations are a generalization of the Delaunay triangulation which provides a class of well-shaped triangulations, over which extra criteria can be optim...
Dieter Mitsche, Maria Saumell, Rodrigo I. Silveira
ICALP
2010
Springer
15 years 11 months ago
Network Design via Core Detouring for Problems without a Core
Some of the currently best-known approximation algorithms for network design are based on random sampling. One of the key steps of such algorithms is connecting a set of source nod...
Fabrizio Grandoni, Thomas Rothvoß
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