9719 search results - page 1533 / 1944 » Answer Set Optimization |
186
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
172
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Due to recent advances in microfluidics technology, digital microfluidic biochips and their associated CAD problems have gained much attention, most of which has been devoted to d...
176
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...
143
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
161
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DAC
1999
ACM
16 years 7 months ago
1999
ACM
Due to the unavoidable need for system debugging, performance tuning, and adaptation to new standards, the engineering change (EC) methodology has emerged as one of the crucial co...