Sciweavers

4330 search results - page 794 / 866
» Analyzing security architectures
Sort
View
SBACPAD
2008
IEEE
100views Hardware» more  SBACPAD 2008»
16 years 21 days ago
Selection of the Register File Size and the Resource Allocation Policy on SMT Processors
The performance impact of the Physical Register File (PRF) size on Simultaneous Multithreading processors has not been extensively studied in spite of being a critical shared reso...
Jesús Alastruey, Teresa Monreal, Francisco ...
ABIALS
2008
Springer
16 years 21 days ago
The Cognitive Body: From Dynamic Modulation to Anticipation
Abstract— Starting from the situated and embodied perspective on the study of biological cognition as a source of inspiration, this paper programmatically outlines a path towards...
Alberto Montebelli, Robert Lowe, Tom Ziemke
RTAS
2006
IEEE
16 years 10 days ago
Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
RTSS
2006
IEEE
16 years 10 days ago
Tightening the Bounds on Feasible Preemption Points
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
SIGCOMM
2006
ACM
16 years 8 days ago
Systematic topology analysis and generation using degree correlations
Researchers have proposed a variety of metrics to measure important graph properties, for instance, in social, biological, and computer networks. Values for a particular graph met...
Priya Mahadevan, Dmitri V. Krioukov, Kevin R. Fall...