In this paper, we propose a Dynamically Reconfigurable Processor Array (DRPA) generator which can generate various types of DRPAs. Our target DRPA architecture is fully parameter...
This paper presents the SPIN micro-network that is a generic, scalable interconnect architecture for system on chip. The SPIN architecture relies on packet switching and point-to-...
This paper investigates the impact of the polarization on the achievable throughput and the probability of successful transmission in the cellular network architectures. A channel...
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
This paper presents a novel and notable swarm approach to evolve an optimal set of weights and architecture of a neural network for classification in data mining. In a distributed ...