We present Justice, a set of extensions to the Liberty simulation infrastructure that model area, wire length, and power consumption in processor architectures. Given an architectu...
- In this paper, we analyze the impact of network contention on the application mapping for tile-based Networkon-Chip (NoC) architectures. Our main theoretical contribution consist...
Hybrid nanoelectronics are emerging as one viable option to sustain the Moore’s Law after the CMOS scaling limit is reached. One main design challenge in hybrid nanoelectronics ...
Commercial-off-the-shelf components (COTS) are widely reused at present and black-box composition is the unique way to integrate them into the target system. However, various mism...
We show that timed automata can be used to model and to analyze timeliness properties of embedded system architectures. Using a case study inspired by industrial practice, we pres...