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CSMR
2004
IEEE
15 years 10 months ago
Using History Information to Improve Design Flaws Detection
1 As systems evolve and their structure decays, maintainers need accurate and automatic identification of the design problems. Current approaches for automatic detection of design...
Daniel Ratiu, Stéphane Ducasse, Tudor G&ici...
CASES
2006
ACM
15 years 10 months ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu
CASES
2006
ACM
15 years 10 months ago
An accurate and efficient simulation-based analysis for worst case interruption delay
This paper proposes an efficient method to analyze worst case interruption delay (WCID) of a workload running on modern microprocessors using a cycle accurate simulator (CAS). Our...
Hiroshi Nakashima, Masahiro Konishi, Takashi Nakad...
DATE
2004
IEEE
151views Hardware» more  DATE 2004»
15 years 10 months ago
Dynamic Voltage and Cache Reconfiguration for Low Power
Given a set of real-time tasks scheduled using the earliest deadline first (EDF) algorithm, we discuss two techniques for reducing power consumption while meeting all timing requi...
André C. Nácul, Tony Givargis
CCS
2006
ACM
15 years 10 months ago
Defeasible security policy composition for web services
The ability to automatically compose security policies created by multiple organizations is fundamental to the development of scalable security systems. The diversity of policies ...
Adam J. Lee, Jodie P. Boyer, Lars E. Olson, Carl A...
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