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ICCD
2002
IEEE
108views Hardware» more  ICCD 2002»
16 years 3 months ago
Low Power Mixed-Mode BIST Based on Mask Pattern Generation Using Dual LFSR Re-Seeding
Low power design techniques have been employed for more than two decades, however an emerging problem is satisfying the test power constraints for avoiding destructive test and im...
Paul M. Rosinger, Bashir M. Al-Hashimi, Nicola Nic...
ICCAD
2008
IEEE
127views Hardware» more  ICCAD 2008»
16 years 3 months ago
Design and optimization of a digital microfluidic biochip for protein crystallization
Proteins crystallization is a commonly used technique for protein analysis and subsequent drug design. It predicts the three-dimensional arrangement of the constituent amino acids...
Tao Xu, Krishnendu Chakrabarty, Vamsee K. Pamula
ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
16 years 3 months ago
A unified non-rectangular device and circuit simulation model for timing and power
— For 65nm and below devices, even after optical proximity correction (OPC), the gate may still be non-rectangular. There are several limited works on the device and circuit char...
Sean X. Shi, Peng Yu, David Z. Pan
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
16 years 3 months ago
Importance of volume discretization of single and coupled interconnects
This paper presents figures of merit and error formulae to determine which interconnects require volume discretization in the GHZ range. Most of the previous work focused mainly o...
Ahmed Shebaita, Dusan Petranovic, Yehea I. Ismail
ICCAD
2004
IEEE
145views Hardware» more  ICCAD 2004»
16 years 3 months ago
Accurate estimation of global buffer delay within a floorplan
Closed formed expressions for buffered interconnect delay approximation have been around for some time. However, previous approaches assume that buffers are free to be placed anyw...
Charles J. Alpert, Jiang Hu, Sachin S. Sapatnekar,...
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