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DAC
2010
ACM
15 years 6 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
CORR
2010
Springer
133views Education» more  CORR 2010»
15 years 6 months ago
PSIM: A tool for analysis of device pairing methods
Wireless networks are a common place nowadays and almost all of the modern devices support wireless communication in some form. These networks differ from more traditional computi...
Yasir Arfat Malkani, Lachhman Das Dhomeja
ESA
2004
Springer
126views Algorithms» more  ESA 2004»
15 years 11 months ago
Path Decomposition Under a New Cost Measure with Applications to Optical Network Design
We introduce a problem directly inspired by its application to DWDM (dense wavelength division multiplexing) network design. We are given a set of demands to be carried over a netw...
Elliot Anshelevich, Lisa Zhang
ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
16 years 3 months ago
Formal model of data reuse analysis for hierarchical memory organizations
– In real-time data-dominated communication and multimedia processing applications, due to the manipulation of large sets of data, a multi-layer memory hierarchy is used to enhan...
Ilie I. Luican, Hongwei Zhu, Florin Balasa
ECBS
1999
IEEE
171views Hardware» more  ECBS 1999»
15 years 10 months ago
Metamodeling - Rapid Design and Evolution of Domain-Specific Modeling Environments
Model integrated computing (MIC) is gaining increased attention as an effective and efficient method for developing, maintaining, and evolving large-scale, domain-specific softwar...
Greg Nordstrom, Janos Sztipanovits, Gabor Karsai, ...