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JSAC
2006
172views more  JSAC 2006»
15 years 6 months ago
A Memory-Efficient Parallel String Matching Architecture for High-Speed Intrusion Detection
The ability to inspect both packet headers and payloads to identify attack signatures makes network intrusion detection system (NIDS) a promising approach to protect Internet syste...
Hongbin Lu, Kai Zheng, Bin Liu, Xin Zhang, Y. Liu
TIFS
2008
142views more  TIFS 2008»
15 years 6 months ago
An FPGA-Based Network Intrusion Detection Architecture
Abstract--Network intrusion detection systems (NIDSs) monitor network traffic for suspicious activity and alert the system or network administrator. With the onset of gigabit netwo...
Abhishek Das, David Nguyen, Joseph Zambreno, Gokha...
DAC
2006
ACM
16 years 7 months ago
Fast analysis of structured power grid by triangularization based structure preserving model order reduction
In this paper, a Triangularization Based Structure preserving (TBS) model order reduction is proposed to verify power integrity of on-chip structured power grid. The power grid is...
Hao Yu, Yiyu Shi, Lei He
DAC
2004
ACM
16 years 7 months ago
Multi-profile based code compression
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Ce...
DAC
2004
ACM
16 years 7 months ago
Profile-based optimal intra-task voltage scheduling for hard real-time applications
This paper presents a set of comprehensive techniques for the intratask voltage scheduling problem to reduce energy consumption in hard real-time tasks of embedded systems. Based ...
Jaewon Seo, Taewhan Kim, Ki-Seok Chung