Reconfigurable Computers based on a combination of conventional microprocessors and Field Programmable Gate Arrays (FPGAs) presents new challenges to designers. Debugging on such ...
Theerayod Wiangtong, Chun Te Ewe, Peter Y. K. Cheu...
This paper introduces the notion of a software decelerator, to be used in logic-centric system architectures. Functions are offloaded from logic to a processor, accepting a speed ...
Eric Keller, Gordon J. Brebner, Philip James-Roxby
The processes giving rise to an event related potential engage several evoked and induced oscillatory components, which reflect phase or non-phase locked activity throughout the mu...
This paper presents an architecture that makes it possible to construct dynamic systems capable of growing in dimension and adapting its knowledge to environmental changes. An arch...
This paper describes a way to manage the modeling and analysis of Scheduled Maintenance Systems (SMS) within an analytically tractable context. We chose a significant case study h...